Phase Noise & Jitter
Phase noise and jitter are two equivalent descriptions of timing uncertainty in an oscillator or clock signal. Phase noise describes instability in the frequency domain — the spectral purity of an oscillator. Jitter describes it in the time domain — the variation of edge transitions from their ideal positions. They are related by an integral transformation.
Phase Noise Definition
The single-sideband (SSB) phase noise L(f) is defined as the ratio of power in a 1 Hz bandwidth at offset f from the carrier to the total carrier power:
Phase noise is plotted on a log-log scale. Typical regions:
| Offset region | Slope | Dominant mechanism |
|---|---|---|
| Very close-in (< 10 Hz) | 1/f³ (−30 dB/decade) | Flicker FM noise |
| Close-in (10 Hz – 10 kHz) | 1/f² (−20 dB/decade) | White FM, Leeson's model |
| Far-from-carrier | Flat (0 dB/decade) | White phase noise (thermal) |
Leeson's Model
For a feedback oscillator with resonator Q factor and noise figure F:
where \(f_m\) is the offset frequency, \(f_0\) is the carrier frequency, \(Q_L\) is the loaded Q, \(P_s\) is the signal power, F is the amplifier noise figure (linear), k = 1.38×10⁻²³ J/K (Boltzmann), and T is the temperature in Kelvin. Higher Q and higher signal power both reduce phase noise.
Phase Noise to Jitter Conversion
RMS jitter integrates the phase noise over a bandwidth from \(f_1\) to \(f_2\):
where L(f) is in linear units (not dBc/Hz). The factor 2 accounts for double-sideband power. The integration limits define what jitter you care about — typically the Nyquist band for a data converter application, or the loop bandwidth for a PLL.
Typical Values
| Oscillator type | Phase noise @ 1 kHz | Phase noise @ 1 MHz | RMS jitter |
|---|---|---|---|
| MEMS oscillator | −120 dBc/Hz | −160 dBc/Hz | 200–500 fs |
| TCXO (100 MHz) | −130 dBc/Hz | −165 dBc/Hz | 50–200 fs |
| OCXO (100 MHz) | −150 dBc/Hz | −170 dBc/Hz | 10–50 fs |
| LC VCO (2.4 GHz) | −85 dBc/Hz | −135 dBc/Hz | 1–5 ps |
| Ring oscillator (1 GHz) | −50 dBc/Hz | −100 dBc/Hz | 10–50 ps |
Jitter Types
- Period jitter: Variation of consecutive clock periods. Relevant for digital setup/hold timing.
- Cycle-to-cycle jitter: Difference between adjacent periods. Related to close-in phase noise.
- Long-term jitter (accumulated): Deviation over many cycles. Related to far-from-carrier noise.
- RMS jitter: Standard deviation σ. Peak-to-peak jitter ≈ 6σ to 7σ at 10⁻¹² BER.
Practical Impact
For an ADC sampling at frequency \(f_s\), phase noise causes an SNR limit called the aperture jitter limit:
At f_in = 1 GHz with σ_t = 100 fs, the jitter-limited SNR is only 24 dB — equivalent to a 4-bit ADC. This is why high-frequency ADC clock sources must have sub-100 fs jitter.